This invention relates to electronic devices and components thereof, and more particularly to packaged power semiconductor devices and direct-bonded metal substrates thereof.
Power semiconductor devices or power devices are designed to operate at relatively high voltages, typically 30-1,000 volts or higher. Many power devices, such as, silicon-controlled rectifiers (xe2x80x9cSCRsxe2x80x9d), power transistors, insulated-gate bipolar transistors (xe2x80x9cIGBTsxe2x80x9d), metal-oxide-semiconductor field-effect transistors (xe2x80x9cMOSFETsxe2x80x9d), power rectifier, power regulators, or combinations thereof, are assembled in packages that are not electrically isolated. That is, a metal tab, which typically forms the backside of the packaged device, is electrically coupled, e.g. soldered, to the semiconductor die within the packaged device. This places the backside of the package at the same electrical potential as the semiconductor die. Additionally, the power semiconductor device may be exposed to voltages outside of the intended range during operation, which may electrically couple to the backside of the package.
The high voltages present at the backside of conventional packaged power semiconductor devices may damage other circuit components or may present a safety hazard to a person operating equipment built with these devices. Voltages as low as 40 Volts can be a hazard to operators working with or on such equipment. Insulating pads or washers are typically used to electrically isolate the backside of the power semiconductor device from the rest of the circuit. In a typical application, the power semiconductor is mounted on a heatsink that is part of an electrical chassis at ground potential.
Heatsinking is important for power semiconductor devices because of the power dissipated by some devices during operation, and also because of the environment that the device may have to operate in. Power semiconductor devices are often used in applications that may get relatively hot, such as in an engine compartment or in a factory. Thus, it is especially important to minimize the thermal resistance between the active device, which may be generating several Watts or even several kilowatts of power, and the environment, which may be at an elevated temperature.
Accordingly, a power semiconductor device preferably should have good thermal conductivity and reliable electrical isolation between the backside of the packaged power device and the semiconductor. One method used to provide such a power device is to manufacture a power device on a substrate having two conductive layers separated by a dielectric layer.
Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof.
In accordance with an aspect of the present invention, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum layers to the dielectric layer and obtain a direct bonded aluminum (DAB) substrate, attaching a semiconductor die to the first aluminum layer of the DAB substrate, and forming an enclosure around the semiconductor die and the DAB substrate while exposing a substantial portion of the second aluminum layer for enhanced heat dissipation.
In some embodiments, the second aluminum layer is flushed to a backside of the enclosure. The plurality of process zones include a preheating zone, a bonding zone, and a cooling zone, wherein the bonding zone is provided with an inert gas to facilitate the bonding of the aluminum layers to the dielectric layer without providing a vacuum environment. The method may comprise shaping an edge of at least one of the aluminum layers to enhance stress-handling characteristics of the DAB substrate. See xe2x80x9cProducts-Features-Dimples (Stress relief)xe2x80x9d at http://www.curamik.de. The shaping step may be performed prior to the bonding of the at least one of the aluminum layers to the dielectric layer. The shaping may be performed on all outer edges of the at least one of the aluminum layers. The shaping step may include providing a slope to the edge of the at least one of the aluminum layers (the slope has an angle of about 30 degrees to about 60 degrees), and forming a plurality of notches, holes, or grooves on the edge of the at least one of the aluminum layers. The first aluminum layer and the second aluminum layer each may be coated by an Alxe2x80x94Si alloy or an Alxe2x80x94Mg alloy opposing to the dielectric layer. The combination of, e.g. Al and Si, typically occurs under high pressure in a cladding roll stand.
In accordance with another aspect of the invention, a method for forming a direct bonded metal substrate for use in a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum substrate and a second aluminum substrate that are electrically isolated from each other by a dielectric substrate. The method further comprises providing the substrate assembly successively into each of the plurality of process zones to bond the first and second aluminum substrates to the dielectric substrate at the same time, thereby obtaining a direct bonded aluminum (DAB) substrate.
In some embodiments, the method may further comprise placing a top boat over the substrate assembly to apply a pressure to facilitate the bonding of at least the first aluminum substrate to the dielectric substrate, and providing a bottom boat below the substrate assembly, wherein the top boat is heavier than the bottom boat.
In accordance with another aspect of the invention, a power semiconductor device comprises a direct bonded metal substrate having first and second conductive layers separated by a dielectric layer. The second conductive layer has edges that are shaped to enhance stress-handling characteristics. A semiconductor die is bonded to the first conductive layer. A plastic package is formed around the semiconductor die and the first conductive layer while exposing a substantial portion of the second conductive layer. The second conductive layer is flushed to a backside of the plastic package.
In some embodiments, the edges of the second conductive layer are provided with a slope of about 30-60 degrees to enhance the stress-handling characteristics. The edges of the second conductive layer are provided with a plurality of notches, holes, grooves, or a combination thereof to enhance the stress-handling characteristics.
In accordance with yet another aspect of the present invention, a direct bonded metal substrate for use in a power semiconductor device comprises a first conductive layer, a second conductive layer, and a dielectric layer provided between the first and second conductive layer and being eutectically bonded with the first and second conductive layers. The edges of the first conductive layer are provided with geometric shapes to enhance stress-handling characteristics of the direct bonded metal substrate.